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Juergen Hilsberg, Engineering Manager Europe IBM Systems &Technology Group Abstract This talk will examine methods that an ASIC design flow can use to help reduce the full cost of implementing differentiated logic design, also to maintain the competitive advantage of ASICs vs. FPGAs or Structured...

Edouard Lamy, Associate Apax Partners Beteiligungsberatung GmbH Abstract The venture capital industry developed a strong interest for the EDA industry in the late 1990s and went onto an investment spree, which resulted in an over-funding of the industry and in most cases did not yield the...

Bernd Lemaitre, DFM Program Manager Yield Management and Methods Infineon Technologies AG; Uwe Gäbler, Project Leader Product Engineering Logic Infineon Technologies AG Abstract In the area of UDSM and today’s continuously changing market conditions, yield ramp has become a key factor in driving...

Wojciech Maly, Professor of Electrical and Computer Engineering Carnegie Mellon University Abstract Manufacturability of an IC is a notion which seems to be well understood. It is usually characterized in terms of predicted yield loss for a given design. But in reality, yield predictions are...

Peter Muhmentaler, Director Test Solution Infineon Technologies AG Abstract This talk refers to the economic constraints as they occur in manufacturing of microelectronic systems. Especially the situation for the mandatory manufacturing test will be explained. This leads to the structure of the test...

Giles Peckham, European Marketing Manager Xilinx Inc. Abstract The market and technical pressures of IC design today are forcing engineers away from ASIC-based projects, and forcing them to consider other logic alternatives. ASIC design times are longer than ever experienced, particularly when...

Willy Reiss, Manager Transfer Services for Software Intensive Systems, Corporate R&D, Robert Bosch GmbH Abstract Today’s cars are mechatronic systems with high complexity. Up to 70 microcontrollers are used and connected by local networks in a car. The trend to increase functionality (and thus...

Wolfgang Roesner Abstract The last few years have dramatically improved technologies like functional coverage, formal verification, semi-formal methods and assertion-based verification. While the emergence of break-through EDA tools is crucial to keep pace with design complexities, the real...

Andrzej J. Strojwas Abstract In the nanometer era, the spectrum of physical phenomena that can contribute to significant yield losses is mind-boggling. The most accurate way of accounting for these effects is to provide accurate physical models and then simulate the actual IC layout to estimate the...

Tom W. Williams Synopsys Fellow and Director of R&D, Test Development Synopsys Inc. Abstract Design has never been simple, but at 130 nm and below – and definitely at 90 nm – it is becoming increasingly difficult. Process and lithography issues continue to drive our advance to new technology nodes...