ROI from Nanometer IC Circuit Verification
Sang Wang, CEO & Chairman Nassda Corporation
Abstract
Investment cost in nanometer IC projects continues to increase at a rapid pace. But more importantly, investment increase will arrive from longer than expected project cycle, design rework to correct silicon problems and to improve yields and substantial catch up effort when products are late to market. Prudent project leaders should address these issues vigorously and take right actions to bring down cost and enhance ROI, particularly if the product is a high volume one with a high stake on its success.
Our full-chip circuit verification and analysis tools did contribute to improve customers’ project ROIs. These come from several areas of cost saving : first, shortening the design cycle by simulating detailed circuit response at a much higher speed than that of conventional tools; secondly, enabling first-time silicon success by performing full-chip post layout circuit verification, which can reduce circuit rework time and cost and accelerate product time-to-market; thirdly, analyses and refinements for imperfect circuits including post-silicon diagnostics and design margin enhancement to help improve yields. When nanometer manufacturing processes impose new parasitic effects in complicating the design and verification of complex ICs, the full-chip circuit simulation, verification and problem analysis capabilities are becoming highly necessary for project success and for good ROI.
