Keynote: “QED and Symbolic QED: Dramatic Improvements in Pre-silicon Verification and Post-silicon Validation”

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Subhasish Mitra (Stanford University, US)


You have all spent weeks or months of onerous manual effort, from writing assertions to running long simulations (with limited success for corner-case bugs) or debugging false positives. This talk will tell you how to detect and localize difficult bugs automatically, in just a few hours, during pre-silicon verification and post-silicon validation of billion transistor-scale designs. Quick Error Detection (QED) targets post-silicon validation and debug. It drastically reduces error detection latency, the time elapsed between the occurrence of an error caused by a bug and its manifestation as an observable failure. Symbolic QED combines QED principles with a formal engine for both pre-silicon verification and post-silicon validation. QED and Symbolic QED are effective for logic design bugs and electrical bugs inside processor cores, hardware accelerators, and uncore components such as cache controllers, memory controllers, interconnection networks or power management units. QED techniques have been successfully used in industry.

Curriculum Vitae

Subhasish Mitra (Stanford University)Subhasish Mitra is Professor of Electrical Engineering and of Computer Science at Stanford University. He also holds the Carnot Chair of Excellence in Nanosystems at CEA-LETI (France).

Prof. Mitra's research ranges broadly across robust computing, nanosystems, VLSI design, validation, test and EDA, and neurosciences. He, jointly with his students and collaborators, demonstrated the first carbon nanotube computer and the first 3D nanosystem with computation immersed in data storage. These demonstrations received wide-spread recognitions (cover of NATURE, Research Highlight to the US Congress by the NSF, highlight as "important, scientific breakthrough" by numerous organizations worldwide). His earlier work on X-Compact test compression has been key to cost-effective manufacturing and high-quality testing of almost all electronic systems. X-Compact and its derivatives have been implemented in widely-used commercial EDA tools. 

Prof. Mitra's honors include the ACM SIGDA/IEEE CEDA Newton Technical Impact Award in EDA (a test of time honor), the Semiconductor Research Corporation's Technical Excellence Award, the Intel Achievement Award (Intel’s highest honor), and the Presidential Early Career Award for Scientists and Engineers from the White House. He is a Fellow of the ACM and the IEEE.