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Technical Session 2 The 7th Heaven of System Level Design Mark Burton, Engineering Manager Arm Ltd. Abstract This talk will describe the Transaction Levels of modeling within SystemC. The various abstraction levels within Transaction Level Modeling (TLM) are identified, and the overview of the APIs...

Business Session 2 Seed, Care and Harvest - Value Focused EDA Abstract Andreas Demleitner, Senior Investment Manager Bay Tech Venture Capital Europe holds a strong position in EDA research, in particular in System-level and mixed signal EDA. National, European and industrially funded research at...

Technical Session 2 The 7th Heaven of System Level Design Peter Flake, ScientistSynopsys, Inc. Abstract There is a need to design and verify systems at an abstraction level which reflects some of the architecture and performance of the system under design, without too much detail. The communication...

Business Session 1 Measure or Die - Design Productivity Andrew B. Kahng, Professor at the Computer Science Department University of California, San Diego Abstract The 2001 International Technology Roadmap for Semiconductors introduced a new design cost model that highlighted both the cost of design...

Business Session 1 Measure or Die - Design Productivity Jürgen Koehl, Senior Technical Staff Member, ASIC Design Center IBM Microelectronics, Inc. Abstract A key factor in the time-to-market for an ASIC design is turnaround time (TAT). Because of the ever-increasing complexity of ASIC designs, a 30%...

Business Session 2 Seed, Care and Harvest - Value Focused EDA Klaus Koeppel, Director Infineon Technologies AG Abstract In the late 90ies Infineon started to grow faster than the competition and is now on position 6 of all semiconductor companies. Everywhere in the world we founded new Development...

Business Session 1 Measure or Die - Design Productivity Keynote Joachim Kunkel, Vice president of Engineering, Design Solutions Synopsys, Inc. Abstract Ever shrinking silicon geometries and the resulting growing number of transistors that can be implemented on a single die will continue to fuel the...

Technical Session 2 The 7th Heaven of System Level Design Keynote Grant Martin, Cadence Fellow, Chief Technologist for the System Level Design and Verification Group Cadence Design Systems, Inc. Abstract System-level design has been the once and future hope for electronic design automation for a...

Company Presentation: Mentor Graphics Coorporation Brian Bailey, Chief Technology Officer Design, Verification and Test Division Mentor Graphics Corp. Abstract 20 years ago, the EDA industry was dramatically changed by the emergence of new languages that permitted a tenfold increase in design...

Giovanni De Micheli, Professor of Electrical Engineering and of Computer Science Stanford University Abstract Forthcoming technologies for realizing microelectronic systems will be characterized by a large spread of physical parameters. At the same time, systems will experience widely varying...