IPQ: IP qualification for efficient system design

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The IP-based system-level modeling and simulation design methodology represents a breakthrough in current design methodology, which has a strong impact on competitiveness. The main goal of this project is to address the qualification and reuse of intellectual property (IP) in current system design in networking, high-speed links, multimedia, and automotive domains by using system-level modeling and verification techniques. This will include design reuse with qualified and parametric IP cores and a seamless design flow integrating existing and emerging tools. It will enable the improvement of developed tools and possible future commercialization.

Project coordination:

AMD Saxony LLC & Co. KG
Dr. Hans-Jürgen Brand
fon: +49 351 277-6016
hans-juergen [dot] brandatamd [dot] com

Project management:

Fraunhofer Institut für Integrierte Schaltungen (IIS)
Dr. Steffen Rülke
fon:
ruelkeateas [dot] iis [dot] fraunhofer [dot] de

Project partners:

Funding initial:

BMBF F&E 01M3048
MEDEA+ A511

Runtime:

Fri, 01 December 2000 - Sun, 30 November 2003

Website:

Project Information

Final Report
Project Flyer (DE)
NL 02 2004 (PN)
NL 01 2004 (PN)
NL 03 2003 (PN)
NL 02 2003 (PB)
NL 02 2002 (PN)
NL 01 2002 (PN)

Used Abbreviations

AbbreviationMeaning
PRProject Report
SPRShort Project Report
PNProject News
FPRFinal Project Report