CHIPS Alliance and Western Digital's RISC-V Related Activities

DruckversionPer E-Mail sendenPDF-Version

Zvonimir Bandić, Western Digital, US


We will present an brief overview of CHIPS Alliance organization, which is an open source hardware organization dedicated to open source development of common hardware IP blocks, and open source software tools for ASIC design. In the second part of the talk we will focus on Western Digital contributions to CHIPS alliance, which are RISC-V SweRV cores, OmniXtend cache coherence over ethernet protocol and work on Verilator project.


Zvonimir Bandić, Western Digital, USZvonimir Z. Bandić is the Research Staff Member and Senior Director of Next Generation Platform Technologies Department in a Western Digital Corporation in San Jose, California. He received his BS in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his MS (1995) and PhD (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He is currently focusing on emerging Non-Volatile Memories (PCM, ReRAM, MRAM) applications for data center distributed computing, including RISC-V based CPU technologies , in-memory compute, RDMA networking, and machine learning hardware acceleration. He has been awarded over 50 patents in the fields of solid state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers. Zvonimir is Chairman of CHIPS Alliance, and Board of Directors member of RISC-V International standards organization.