Publications

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  1. Rethinking Firmware Design, W. Ecker (Infineon Technologies AG, DE), International Workshop on Embedded Software for Industrial IoT (ESIIT) at Design, Automation and Test Conference (DATE), Dresden, DE, March 23, 2018.
  2. A Structured Approach for Generating Embedded Software, D. Keerthikumara,1,2, W. Ecker2,3, S. Lorenzo2,4, M. Werner2 (1U Kaiserslautern, DE, 2Infineon Technologies AG, DE, 3TU Munich, DE, 4U Linz, AT), International Workshop on Embedded Software for Industrial IoT (ESIIT) at Design, Automation and Test Conference (DATE), Dresden, DE, March 23, 2018.
  3. The Third Major Revolution in Embedded Development: P. Lieber, R. Bretz (SparxServices, AT), International Workshop on Embedded Software for Industrial IoT (ESIIT) at Design, Automation and Test Conference (DATE), Dresden, DE, March 23, 2018.
  4. Invited Talk: Bridging the Gap between Hardware Description Languages and IP-XACT: Esko Pekkarinen, Timo D. Hämäläinen, (TU Tampere, FL), International Workshop on Embedded Software for Industrial IoT (ESIIT) at Design, Automation and Test Conference (DATE), Dresden, DE, March 23, 2018.
  5. Invited Talk: Ultra Low Power Solutions for IoT Devices: L. Koskinen (Minima Processor Ltd., FL), International Workshop on Embedded Software for Industrial IoT (ESIIT) at Design, Automation and Test Conference (DATE), Dresden, DE, March 23, 2018.
  6. Challenges in Property Generation, Wolfgang Ecker (Infineon Technologies AG und TU Munich, DE, edaWorkshop18, Hannover, DE, May 16, 2018.
  7. Firmware Generation: State-of-the-Art, Challenges, and New Approaches, Wolfgang Ecker, Lorenzo Servadei, Michael Werner, Elena Zennaro (Infineon Technologies AG und TU Munich, DE), edaWorkshop18, Hannover, DE, May 17, 2018.
  8. COMPACT-Project, W. Ecker, Infineon, DE, et al., ITEA Innovation Days in Helsinki, FI, April 2018.
  9. Daniel Mueller-Gritschneder: Extendable Translating Instruction Set Simulator (ETISS) with RISC-V Support and SystemC/TLM Pulpino Virtual Platform, Presentation at the RISC-V Activities Workshop, Munich, DE, June 21, 2018.
  10. P. Adelt, B. Koppelmann, W. Mueller. Current and Future RISC-V Activities for Virtual Prototyping and Chip Design. Presentation at the RISC-V Activities Workshop, Munich, DE, June 21, 2018.
  11. A Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications, Elena Zennaro2, Lorenzo Servadei2, Keerthikumara Devarajegowda12 and Wolfgang Ecker23 (1U Kaiserslautern, DE, 2Infineon Technologies AG, DE, 3TU Munich, DE), Euromicro Conference on Digital System Design, Prague, CZ, August 2018.
  12. Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann: Automated Redirection of Hardware Accesses for Host-Compiled Software Simulation, Forum on Design Languages (FDL), Munich, DE, Sept. 2018.
  13. Aljoscha Kirchner, Jan-Hendrik Oetjens, Oliver Bringmann; Using SysML for Modelling and Code Generation for Smart Sensor ASICs, Forum on Design Languages (FDL), Munich, DE, Sept. 2018.
  14. Daniel Müller-Gritschneder, Ulf Schlichtmann; Extendable Translating Instruction Set Simulator (ETISS); Poster at ARM Research Summit, Cambridge, UK, Sept. 2018.
  15. Invited Talk: Embedded Systems Automation following OMG’s Model Driven Architecture Vision, W. Ecker2,3, D. Keerthikumara,1,2, M. Werner2 (1U Kaiserslautern, DE, 2Infineon Technologies AG, DE, 3TU Munich, DE), at Design, Automation and Test Conference (DATE), Florence, IT, March 28, 2019