San Fransisco, July 23-28, 2006
edited by Dieter Treytnar and Ralf Popp
DAC-Trend report 2006 as a pdf file (2815 KB) [1]
Introduction
This report presents topics and trends of importance, which were presented and discussed during the 43rd Design Automation Conference (DAC) in San Francisco. Due to the gigantic offer of information at DAC, it cannot be complete. The report has got its input from the technical sessions like Keynotes, Panel Discussions and some Paper Sessions and, in addition, from different on-line publications and naturally impressions and discussions on site.
The available text does not contain any conception or evaluation of new software. However, there is a noteworthy possibility to use the tool service under www.dacafe.com [2] of accomplishing tool and manufacturer searches via Internet. Additional information about tools can be found in the annual DAC report of John Cooley, moderator of the E-Mail-Synopsys-Users-Group (ESNUG). In particular, interesting tool evaluations from designers are published at www.deepchip.com [3].
While in the first Section of this report general information about DAC can be found, in the second section the technical program and/or its sessions are discussed including the panel discussions of the DAC pavilion which have taken place in the exhibition. Reports of interesting meetings surrounding DAC can be found in Section three. Section four was written by some of our members who had a booth in the showroom. It gives an impression of the exhibition. In Section five references of sources are given. Finally Section six gives a summary.
Content
| 1 | Concerning DAC in General |
| 2 | Technical Program |
| 2.1 | Monday Keynote: „ iPod or Iridium - Which One Are You Going To Be?” by Joe Costello |
| 2.2 | Tuesday Keynote: „ Structuring Process and Design for Future Mobile Communication Devices?” by Hans Stork |
| 2.3 | Thursday Keynote: „ The Challenges of Convergence” by Alessandro Cremonesi |
| 2.4 | Panel: „How Will the Fabless Model Survive?”, (Session 1), moderated by Gary Smith |
| 2.5 | Panel: „The IC Nanometer Race: What Will It Take to Win?”, (Session 6), moderated by Walden C. Rhines |
| 2.6 | Panel: „Entering the Hot Zone -- Can You Handle the Heat and Be Cool?”, (Session 11), moderated by Daya Nadamuni |
| 2.7 | Panel: „Building a Standard ESL Design and Verification Methodology: Is It Just a Dream?”, (Session 22), moderated by Gary Smith |
| 2.8 | Panel: „PANEL: Variation-Aware Analysis: Savior of the Nanometer Era?”, (Session 26), moderated by Bill Joyner |
| 2.9 | Panel: „Design Challenges for Next-Generation Multimedia, Game and Entertainment Platforms”, (Session 29), moderated by Bryan Lewis |
| 2.10 | Panel: „Tomorrow's Analog: Just Dead or Just Different”, (Session 40), moderated by Georges Gielen |
| 2.11 | Panel: „Building a Verification Test Plan: Trading Brute Force for Finesse”, (Session 46),m oderated by Sharad Malik |
| 2.13 | DAC Pavillon: Ask the CTO |
| 3 | Additional Events |
| 3.1 | Gartner Briefing |
| 3.2 | Fourth Annual Hacks & Flacks Roundtable Discussion at DAC |
| 3.3 | Analog Mixed Signal Breakfast: The Future of Circuit Simulation |
| 3.4 | Accellera Panel |
| 4 | The Exhibition |
| 4.1 | Enovia MatrixOne |
| 4.2 | Mentor Graphics |
| 4.3 | MunEDA |
| 4.4 | OneSpin Solutions GmbH |
| 4.5 | Synopsys |
| 5 | References |
| 6 | Conclusion |
