Technology Aware Modelling for Automation in Physical Design of Heterogeneous Systems

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Stephan Guttowski, Fraunhofer IZM


While system-on-chip (SoC) and PCB design teams are operating with highly developed EDA tools, there is a lack of automation tools for the design of heterogeneous systems. This is particularly true for the engineering of so called 2.5D SiP, which integrate heterogeneous components (IC's, passives etc.) over several vertical layers/modules. For these systems component placement today is a time consuming task. Even more important is the lack of a tool support for technology selection.

In this talk a new methodology for component autoplacement for folded and stacked 2.5D SiP integrated with technology selection on an objective basis is presented. A design approach that is based on the simultaneous consideration of numerous layout solutions will be shown and demonstrated. The structuring of physical design, a novel modelling of technological components for folded and stacked 2.5D SiP, and sketch algorithms for technology constrained automated placement, based on multicriteria optimization, will be discussed. Together with a multicriteria decision support tool this results in a novel design approach for heterogeneous systems.

Curriculum Vitae

Herr Dr. Stephan Guttowski Dr. Stephan Guttowski obtained his M.Sc. degree in EE from in 1994 and his Ph.D. degree in 1998 from the Technical University Berlin. From 1998 to 1999, Dr. Guttowski worked as a Post Doctoral Research Fellow at the Massachusetts Institute of Technology (M.I.T.) in Cambridge, USA. In 1999, he joined the Research Laboratory for Electric Drives at DaimlerChrysler AG in Berlin. Dr. Guttowski started to work with Fraunhofer IZM Berlin in October 2001. From 2002 to 2005, he headed the Advanced System Development Group. Since January 2006, he has been head of the department of System Design & Integration. Dr. Guttowski is a member of the Association of German Electrical Engineers (VDE) and the Institute of Electrical and Electronics Engineers (IEEE).