RISQ-V: Instruction Set Extensions and Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography

Printer-friendly versionSend by emailPDF version

Tim Fritzmann, Technical University of Munich, DE

Authors: Tim Fritzmann1), Debapriya Basu Roy1), Johanna Sepùlveda2), Georg Sigl1)
1) Technical University of Munich, Chair for Security in Information Technology
2) AIRBUS Defence and Space GmbH

Abstract

Empowering electronic devices to support Post-Quantum Cryptography (PQC) is a challenging task. PQC introduces new mathematical elements and operations which are usually not easy to implement on standard processors. Especially for low cost and resource constraint devices, hardware acceleration is usually required. In addition, as the standardization process of PQC is still ongoing, a focus on maintaining flexibility is mandatory. To cope with such requirements, hardware/software co-design techniques have been recently used for developing complex and highly customized PQC solutions. However, while most of the previous works have developed loosely coupled PQC accelerators, the design of tightly coupled accelerators and Instruction Set Architecture (ISA) extensions for PQC have been barely explored. To this end, we present RISQ-V, an enhanced RISC-V architecture that integrates a set of powerful tightly coupled accelerators to speed up lattice and isogeny based PQC. RISQ-V efficiently reuses processor resources and reduces the amount of memory accesses. We present the following contributions. First, we propose a set of powerful hardware accelerators deeply integrated into the RISC-V pipeline. Second, we extended the RISC-V ISA with new instructions to efficiently perform operations for lattice and isogeny based cryptography.

Biography

Tim Fritzmann, Technical University of Munich, DEIn 2013, Mr. Fritzmann obtained the bachelor's degree in Electrical Engineering. After finishing his degree, he worked for two years as a hardware engineer at Thales. In 2017, he obtained the master's degree in Electrical Engineering and received the Walter Gademann award at the Technical University of Munich, Germany. Since 2018, he holds a PhD position at this university. His interests of research are efficient and secure HW/SW implementations of Post-Quantum Cryptography.