VALSE: Highly automated, certified, and scaled Validation of "System-on-Chip"-Designs

Printer-friendly version Send by email PDF version
VALSE Logo

The realization of a complete system on one chip is a great challenge for EDA. A crucial point to solve this task is the availability of high quality modules. Such a high quality level can only be achieved by formal verification methods. VALSE is a verification project that wants to revolutionize the validation of SoC designs.

Project coordination:

Infineon Technologies AG
Wolfram Büttner
fon:

Project management:

Technische Universität Kaiserslautern
Prof. Dr.-Ing. Wolfgang Kunz
fon: +49 631 205-2603
kunzateit [dot] uni-kl [dot] de

Project partners:

Research partners:

Funding initial:

BMBF F&E 01M3052

Runtime:

March 01, 2001 - February 28, 2003

Website:

Project Information

Final Report
Project Flyer (DE)
NL 02 2002 (PN)
NL 01 2002 (PB)

Used Abbreviations

AbbreviationMeaning
PRProject Report
SPRShort Project Report
PNProject News
FPRFinal Project Report