HERKULES: Hardware design techniques for zero defect design

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The main objective of the HERKULES project is to formally verify a major portion of the communication infrastructure of System-On-Chip (SoC). By fully implementing the results of the Valse and Valse-XT research projects, HERKULES will combine the maximum quality and superior productivity of the formal verifi-cation approach in order to give the final product a competitive edge. Simulation-based verification will still be necessary for the verification of the complete system concept. However, by using HERKULES technology specifically to perform those tasks which can be more effectively accomplished formally, the verification process will be relieved from a whole set of code verification tasks. The HERKULES methodology is to be implemented in such a way that its use will allow both IC providers as well as IC customers and integrators to meet “zero defects” quality requirements. This will be achieved by considering various perspectives of the verification task. Apart from a purely technical description, methods for successful planning and monitoring of verification projects utilizing HERKULES technology will be presented.

Classification in the edaMatrix:

HERKULES in the edaMatrix

Project coordination:

Alcatel-Lucent Deutschland AG
Dr. Hans-Werner Sahm
fon: +49 911 526-5638

Project management:

Technische Universität Chemnitz
Prof. Dr. Ulrich Heinkel
fon: +49 371 531-24310
ulrich [dot] heinkelatetit [dot] tu-chemnitz [dot] de

Project partners:

Research partners:

Funding initial:

BMBF F&E 01M3082


December 01, 2006 - November 30, 2009



Project Information

Final Report
NL 01 2010 (PN)
NL 04 2009 (PN)
NL 01 2009 (PB)
NL 03 2007 (PN)
NL 01 2007 (PKB)
NL 04 2006 (PN)

Used Abbreviations

PRProject Report
SPRShort Project Report
PNProject News
FPRFinal Project Report