5th Workshop on RISC-V Activities
7 November 2022
This joint academic/industry workshop aims to stimulate the exchange of information among the attendees about already existing or planned RISC-V activities. The workshop provides a platform for how these activities can be extended across projects or to develop new ideas, activities and collaborations. This workshop has been initiated by the BMBF funded project Scale4Edge [1] and will be executed in conjunction with the edaForum22 and MICROELECTRONICS FOR FUTURE 22 [2].
Date: 7 November 2022
Location: Hotel NH Collection Berlin Mitte, Friedrichstraße 96, 10117 Berlin, Germany [3]; in Google Maps [4]
Workshop language: English
RISC-V is one of the hottest trends in the industry these days, with its mature software toolchain and many hardware processor providers offering implementations ranging from textbook open-source cores to high-end commercial ones. The freedom to configure and customize the RISC-V ISA in accordance to the system needs, including custom instructions, is one of its strongest appeals, making custom RISC-V CPUs an attractive choice for an unprecedented number of companies. However, the challenge of actually designing a RISC-V core with custom extensions and ensuring its correct functional behaviour is still significant, even more in environments with high safety and security expectations.
About the Workshop series: https://www.edacentrum.de/en/risc-v/trainings [5]
Program: https://www.edacentrum.de/en/risc-v/program [6]
Registration
- Registration deadline: 31 October 2022 AoE*)
Registration is open!
Registrations can be done online at https://www.edacentrum.de/en/risc-v/registration [7] only!
Deadlines
Short abstract deadline: | Sep 28, 2022 AoE*) | |
Author notification: | Oct 7, 2022 AoE*) | |
Program available: | Oct 14, 2022 AoE*) | |
Registration deadline: | Oct 31, 2022 AoE*) |
*) AoE = Anywhere on Earth
Organizing Committee
- Oliver Bringmann, Universität Tübingen, DE
- Wolfgang Ecker, Infineon Technologies, DE
- Andreas Mauderer, Robert Bosch GmbH, DE
- Daniel Müller-Gritschneder, Technische Universität München, DE
- Wolfgang Müller, Universität Paderborn, DE
- Dieter Treytnar, edacentrum, DE
- Andreas Vörg, edacentrum, DE
- Stefan Wallentowitz, Hochschule München, DE
In case of questions, please contact:
Andreas Vörg or Dieter Treytnar
risc-vedacentrum [dot] de