Juergen Hilsberg, Engineering Manager Europe IBM Systems &Technology Group
Abstract
This talk will examine methods that an ASIC design flow can use to help reduce the full cost of implementing differentiated logic design, also to maintain the competitive advantage of ASICs vs. FPGAs or Structured ASICs.
Cost management is one of the most important implementation considerations for any design manager. While NRE (non-recoverable expenses such as mask costs) and prototype turn-around time are certainly easy to identify and do represent a significant investment for any design team, other significant cost considerations also include the cost of design/characterization, personnel for the duration of the project and the cost of lost opportunity. All of them can grow considerably if the project takes longer than expected to get to market because more than one tape-out is required before the design is stable.
Techniques used by IBM are discussed such as design to maximize yield and design to optimize performance while minimizing power consumption. This is achieved with an ASIC design flow that is fully integrated across all aspects of the semiconductor process and aimed at getting complex, leading edge designs done right the first time.
Curriculum Vitae
Juergen Hilsberg is IBM Technology Group‘s European Engineering Manager, based at regional Sales & Marketing headquarters in Geneva. He manages the group‘s Field Applications and Field Design Center teams, delivering technical support, including design execution, to IBM Microelectronics‘ European customers. They cover the division‘s entire product portfolio, including ASICs, embedded IBM PowerPC and Network Processors, integrated set-top box controllers, CMOS & SiGe foundry technologies/services and others. He has almost 15 years of electronics industry experience, primarily in the ASIC and SoC domain. He graduated from the Fachhochschule in Heilbronn, Germany, in 1990, with a degree in electronic engineering.
