Raúl Camposano (Nimbic)
Abstract
A mobile system such as a smartphone typically includes several radios at frequencies from 0.8-5Ghz and a multi-core processor running at 1-2 GHz. Digital systems behavior typically matters up to f=1/2 Tr, where Tr is the raise/fall time of the clock. For a 1 GHz clock with a rise time of 100 ps, Tr=5 GHz. At 5 GHz the wavelength is 6 cm. If a signal travels a distance comparable to its wavelength, it needs to be modeled as a wave for accurate predictions, using an electromagnetic (EM) simulator (rather than a circuit simulator). Packages, MCMs and boards have to be analyzed using EM simulators for signal integrity, power integrity and EM Interference. For example, EM simulators extract S-parameters of package-board systems, which are used with models of on-chip drivers/ receivers for time domain channel simulation.
Technology drivers, which impact EM simulation, include higher frequencies, e.g. Chip to Board is expected to reach 60 Gb/s for high-speed serial links in this decade, decreasing voltages to 0.4- 0.8 V with consequently smaller margins for device switching and higher susceptibility to noise, and 3D Integrated Circuit Packaging (Silicon Interposer, Stacked Die, Package on Package).
This talk focuses on applications of EM simulators in electronic system design (chip-package-board systems). We describe the market for EM simulators and its largest segments. We introduce the basic EM solvers including 2D, 2.5 and 3D approaches, full wave and quasi-static techniques, and finite difference, finite element and boundary element solvers. We show several practical examples and conclude with an outlook on how to scale EM simulation cost effectively using massive parallelism on a commodity-computing infrastructure such as a public cloud.
Curriculum Vitae
Raul Camposano is the CEO of Nimbic, a startup in Silicon Valley. Previously he was CTO and General Manager at Synopsys, Professor at the Univ. of Paderborn and GMD, and a researcher at IBM T.J. Watson. Raul holds an MS in EE from the Univ. of Chile, and a PhD in CS from the Univ. of Karlsruhe. He has published over 70 technical papers and is an IEEE Fellow.
