Company Presentation: Synopsys, Inc.
"EDA Tools and Methodologies: A Synopsys Perspective"
Design has never been simple, but at 130 nm and below – and definitely at 90 nm – it is becoming increasingly difficult, so much so that design has truly entered a new age. Compute power, multi-media, graphics and communications features are converging in consumer products, putting additional pressure on engineers to create designs that are especially sensitive to cost, power consumption and size. What tools will designers need to successfully face these challenges, and where will those tools come from?
Today, Synopsys is the leading provider of EDA software and services used to design and verify complex ICs, FPGAs and SoCs for the global semiconductor and electronics industries. They provide system-level to silicon-level verification, a complete front-to-back design and test environment, design reuse technology, and professional services to help their customers get their silicon working quickly and accurately. Synopsys solutions include pre-designed and pre-verified blocks of intellectual property (IP) that can be easily inserted into design flows, as well as technology to address yield and manufacturing issues early in the design process.
In this presentation, T. W. Williams addresses these current challenges and future possibilities facing designers, and discusses the tools and methodologies with which Synopsys is responding.
Tom W. Williams
Synopsys Fellow and Director of R&D, Test Development